4200 TS-Socket

From Technologic Systems Manuals

Please refer to your baseboard wiki or schematics for more details on which of these pins go where.

CN1 CN2
Name Pin Pin Name
FPGA_JTAG_TMS 1 2 EXT_RESET#
FPGA_JTAG_TCK 3 C 4 EN_USB_5V
FPGA_JTAG_TDO 5 N 6 SDCARD_D2
FPGA_JTAG_TDI 7 1 8 SDCARD_D3
OFF_BD_RESET# 9 10 SDCARD_CMD
BOOT_OVERRIDE 11 12 SDCARD_3.3V
SPI0_CLK 13 C 14 SDCARD_CLK
POWER 15 N 16 POWER
Reserved 17 1 18 SDCARD_D0
Reserved 19 20 SDCARD_D1
Reserved 21 22 SER_FLASH_WP
Reserved 23 C 24 Reserved
Reserved 25 N 26 Reserved
Reserved 27 1 28 Reserved
POWER 29 30 Reserved
Reserved 31 32 Reserved
Reserved 33 C 34 Reserved
Reserved 35 N 36 V_BAT
Reserved 37 1 38 Reserved
Reserved 39 40 Reserved
Reserved 41 42 Reserved
Reserved 43 C 44 Reserved
Reserved 45 N 46 Reserved
POWER 47 1 48 Reserved
Reserved 49 50 Reserved
Reserved 51 52 Reserved
Reserved 53 C 54 Reserved
Reserved 55 N 56 Reserved
Reserved 57 1 58 Reserved
Reserved 59 60 Reserved
Reserved 61 62 GND
DIO_14 63 C 64 MUX_AD15
DIO_13 65 N 66 MUX_AD14
DIO_12 67 1 68 MUX_AD13
DIO_11 69 70 MUX_AD12
DIO_10 71 72 MUX_AD11
DIO_9 73 C 74 MUX_AD10
GND 75 N 76 MUX_AD09
DIO_8 77 1 78 MUX_AD08
DIO_7 79 80 MUX_AD07
DIO_6 81 82 MUX_AD06
DIO_5 83 C 84 MUX_AD05
DIO_4 85 N 86 MUX_AD04
DIO_3 87 1 88 MUX_AD03
DIO_2 89 90 MUX_AD02
DIO_1 91 92 MUX_AD01
DIO_0 93 C 94 MUX_AD00
GND 95 N 96 BUS_ALE#
BUS_WAIT# 97 1 98 BUS_DIR
BUS_BHE# 99 100 BUS_CS#
Name Pin Pin Name
ETH_RX+ 1 2 ETH_LEFT_LED
ETH_RX- 3 C 4 ETH_RIGHT_LED
ETH_CT 5 N 6 RED_LED#
ETH_TX+ 7 2 8 GREEN_LED#
ETH_TX- 9 10 SHUT_DOWN
ETH_CT 11 12 WAKE_UP
3.3V 13 C 14 PC6
GND 15 N 16 PC0
Reserved 17 2 18 PC1
Reserved 19 20 PC2
GND 21 22 PC3_SPI_CS3#
DEV_USB_M 23 C 24 AN_VREF
DEV_USB_P 25 N 26 PA22
1.0V BU 27 2 28 TW_CLK
HOST_USB_M 29 30 TW_DAT
HOST_USB_P 31 32 PA6
1.0V 33 C 34 Reserved
HOSTB_USB_M 35 N 36 PB16
HOSTB_USB_P 37 2 38 PB17
3.3V 39 40 PB18
Reserved 41 42 PB19
Reserved 43 C 44 CPU_JTAG_TMS
GND 45 N 46 CPU_JTAG_TCK
Reserved 47 2 48 CPU_JTAG_TDI
Reserved 49 50 CPU_JTAG_TDO
GND 51 52 PB28
Reserved 53 C 54 PC8
Reserved 55 N 56 DIO_16
1.8V 57 2 58 PB20
Reserved 59 60 PB21
Reserved 61 62 PB22
1.5V 63 C 64 PB25
SPI_CS0# 65 N 66 PB26
SPI_MOSI 67 2 68 PB27
SPI_MISO 69 70 PB30
SPI_CLK 71 72 PB29
GND 73 C 74 Reserved
PC4_SPI_CS2# 75 N 76 Reserved
PC4_SPI_CS1# 77 2 78 UART0_TXD(PB4)
3.3V 79 80 UART0_RXD(PB5)
PB23 81 82 UART1_TXD(PB6)
Reserved 83 C 84 UART1_RXD(PB7)
PC9 85 N 86 UART2_TXD(PB8)
PC10 87 2 88 UART2_RXD(PB9)
PC13 89 90 UART3_TXD(PB10)
PC14_IRQ2 91 92 UART3_RXD(PB11)
DEBUG_TXD 93 C 94 UART4_TXD(PA31)
DEBUG_RXD 95 N 96 UART4_RXD(PA30)
DIO_15 97 2 98 UART5_TXD(PB12)]]
PC7 99 100 UART5_RXD(PB13)