4700 FPGA Programming

From Technologic Systems Manuals
Note: We do not provide support for the opencores under the free support, however we do offer custom FPGA programming services. If interested, please contact us.

The opencore FPGA sources are available here.

We have prepared the opencore projects which gives you the ability to reprogram the FPGA while either preserving or removing our functionality as you choose. The code sources are in verilog, and we use Lattice Diamond to generate the JEDEC file. You can download Lattice Diamond from their site. You can request a free license, and it will run in either Windows or Linux (only Redhat is supported). In the sources you can find the functionality switches in the ts4700_top.v file:

parameter xuart_opt = 1'b1;
parameter can_opt = 1'b1;
parameter can2_opt = 1'b0;
parameter touchscreen_opt = 1'b1;
parameter spi_opt = 1'b1;

You can use these switches to enable and disable functionality. We do not enable everything at the same time because of space constraints on the FPGA. So for example, lets say you wanted to change from 2 enabled XUARTs to 7 enabled XUARTS. Lattice Diamond will not place them if they are not used. In this core we automatically disable XUARTS depending on if you have CAN enabled. To change this, you would simple change the toggles:

parameter xuart_opt = 1'b1;
parameter can_opt = 1'b0;
parameter can2_opt = 1'b0;
parameter touchscreen_opt = 1'b1;
parameter spi_opt = 1'b1;

For more advanced changes you may look to opencores.org which has many examples of FPGA cores. To build the FPGA with your new changes, go to the 'Processes' tab and double-click 'JEDEC File'. This will build a jedec file in the project directory. On a linux system, either x86 compatible or ARM, we provide an application called jed2vme.

jed2vme for x86

jed2vme for ARM (oabi)

We also have the sources here.

WARNING: Do not use the 'jed2vme' provided by Lattice. Their version writes to flash and as the opencores do not contain the bootrom this will brick your board.

jed2vme can be used like this:

jed2vme bitstream.jed | gzip > bitstream.vme.gz

To load this bitstream in your FPGA you will need to copy it to the initrd and name it '/ts4700_bitstream.vme.gz'. During the beginning of the linuxrc script it will start the reload with the command below. This must be done before the userspace ctl applications start or they may try to make use of the FPGA while it is being programmed, or the FPGA programming may just fail.

ts4700ctl --loadfpga=ts4700_bitstream.vme.gz

The FPGA contains flash memory which contains Technologic System's default FPGA SRAM load. The "ts4700ctl --loadfpga" will not overwrite the flash memory of the FPGA and will only load the SRAM contents of the FPGA, making for an unbrickable system if something should go wrong. If something does go wrong, you can restore the onboard flash via the offboard flash or microSD card.