EP9302 Interrupts

From Technologic Systems Manuals

The EP9302 interrupt controller allows up to 54 interrupts to generate an Interrupt Request (IRQ) or Fast Interrupt Request (FIQ) signal to the processor core. Thirty-two hardware priority assignments are provided for assisting IRQ vectoring, and two levels are provided for FIQ vectoring. This allows time critical interrupts to be processed in the shortest time possible.

The EP9302 interrupt controller also includes the following features:

  • Supports 54 interrupts from a variety of sources (such as UARTs, GPIO and ADC)
  • Routes interrupt sources to either the ARM920T’s IRQ or FIQ (Fast IRQ) inputs
  • Three dedicated off-chip interrupt lines operate as active high level sensitive interrupts
  • Any of the 19 GPIO lines maybe configured to generate interrupts
  • Software supported priority mask for all FIQs and IRQs
Note: For peripheral driver development purpose, notice that the external IRQ lines 5,6 and 7, which are ISA/X86 architecture based, are mapped to EP9302 external interrupt lines 22, 33 and 40, respectively. For further information about interrupts, including the EP9302 interrupt controller and map, refer to the EP9302 User's Guide, chapter 5.