From Technologic Systems Manuals

The FPGA's base address is returned from inquiry to the system BIOS. Once the BIOS has assigned a base address for the FPGA on the PCI bus, this table of registers will appear at the listed offset. TBD: Insert table of register functions and their address offsets.

fpga_reg_200h <= 8'h44  -- TBD Function
fpga_reg_16fh <= 8'd0   -- TBD Function 
fpga_reg_202h <= 8'd0   -- TBD Function, probably RTC-related
fpga_reg_204h <= 8'd0   -- i2c, rtc mirror enable - need bitwise definition.
fpga_reg_205h <= 8'd0   -- red/grn LEDs 
fpga_reg_206h <= 8'd0   -- spi flash select, lan LED, power cycle 
flash select pad 1 is at 0x206 bits 2 and 3 (out enable and out value).
flash select pad 2 is at 0x206 bits 5 and 6 (out enable and out value).
power_cycle_pad_o is at  0x206 bit 7

fpga_reg_207h <= 8'd2   -- jtag ?
fpga_reg_20ah <= 8'd0   -- SPI to FPGA flash