TS-4500 bitstreams

From Technologic Systems Manuals
Bitstream Revision SD controller SPI XNAND CAN XUARTs
Default 6 On On On On 0-1
ts4500_opencore-rev6-8XUART 6 On On On Off 0-7
FPGA Revision Log
Revision Changes
0 Initial Release
1 Added another bit to SPI speed to allow lower speeds (1.2Mhz), Fixed DIO pins
2 Fixed CAN clock enable/disable.
3 Added full-duplex RS485 (RS422) enable bit to syscon.
4 Fix CAN and resynchronizers.
5 Bootrom changed to make extended temp mode use 175Mhz CPU rather than 200Mhz for SD card access.
6 Bootrom change to modify CPU startup code to not wait for IRQ as it may not function properly