TS-4700 PCB Changelog

From Technologic Systems Manuals
Revision Changes
A
  • Initial Release
B
  • FPGA 1.2V regulator (U7) changed from a NCP584 to a NCP585
  • CPU Core regulator changed from a (U15) AOZ1022 to a (U19) SC183C
  • Power sequencer circuit updated (added U15 and U16).
  • Reset Latch (U4) uses a different signal for reset.
C
  • Change RAM (U17 & U18) from two x8 DDR2 to one x16 DDR3 to address EOL of original RAM.
  • Add RAM termination circuit (U17)
  • RAM regulator changed for 1.5V for DDR3 from FAN2022 (U6) to MVPG30 (U18)
  • Adjust power sequence