The TS-7600 i.MX28 CPU brings out 5 channels of LRADC, Low-Resolution Analog to Digital Converters. The CPU peripheral is 12-bit, 1.85 V input ADC with a 1.3% absolute error at approximately 428 KHz. The channels do have diode clamps in place for added over-volt protection. Four of the channels are brought out to DIO pins and are in parallel with the signal lines. These are fed through a divide-by-two resistor divider, and then are connected to the ADC input pins. The fifth channel is hard-wired to the 5v power input through a divide-by-three resistor network in order to monitor the input voltage.
In order to get accurate readings from the four channels brought out, the DIOs in parallel must be tri-stated and have no other signals driving. The DIO pins in parallel do have pull-up resistors enabled inside the FPGA which can skew the ADC results, and requires that the ADC signal be strong enough to overcome the pull-ups. There are two actions that can be taken to reduce the skew of ADC results from the FPGA pull-ups. One is to calibrate out the error. If the ADC input signal is constant current, the voltage shift induced by the FPGA will be constant as well. This error can then be calibrated out very easily. The other option is to modify the FPGA and remove the pull-up on the associated DIO pins, see the FPGA Programming section for more information. Please note that removing the pull-ups on the DIO pins may have adverse side effects since the pins will be floating. The resistor divider on the ADC pins will help to create a very weak pull-down however. See the DIO section for pin placement.
Sample code to read the ADCs is provided by Technologic Systems, see imx28_adc.c. This code can be used as-is, or integrated in to a C application. The code can also be translated in to other languages that allow for direct memory mapping and manipulation. The sample code will output the result of all 5 channels in millivolts after sampling each channel 10 times and averaging the results. This sample code also allows for easily adjusting offset errors via calibration.
This sample code is integrated in to our 'tshwctl' application for quick testing and verification:
The command will return output similar to the following:
LRADC_ADC1_millivolts=12 LRADC_ADC2_millivolts=10 LRADC_ADC3_millivolts=10 LRADC_ADC4_millivolts=3240 LRADC_ADC6_millivolts=6072
For more information about the LRADCs, see the CPU manual