TS-7600 FPGA

From Technologic Systems Manuals

The TS-7600 features an FPGA designed to accentuate the i.MX28 CPU peripherals with some additional peripherals and flexibility. The FPGA is connected to the CPU through our NBUS interface, which is a 16-bit data bus interface. There are no 8bit bus cycles to the FPGA.

To access peripherals in the FPGA, use the following base addresses:

Offset Usage
0x00 Syscon registers
0x40 XUART Interface registers
0x5c XUART Memory window interface
0x60 SPI interface