The MUXBUS is the bus between the FPGA on the macrocontroller to communicate with the offboard CPLD. The CPLD controls PC/104 access as well as some DIO. The MUXBUS config register in the #Syscon allows enabling and configuring the speed for this bus. The MUXBUS timing also influences the communication with PC/104 peripherals.
For more advanced details on the MUXBUS, refer to the implementation details here.