TS-8900-pc104

From Technologic Systems Manuals

The PC104 header on this board can be used as either GPIO, or ISA for communication with common PC104 peripherals. The connector consists of two rows of pins labeled A and B, the numbering of of which is shown below. The signals for the PC-104 are generated by the LFXP2 located on the baseboard.

Any of the IO on this board labelled DIO_ can be controlled through tsctl as PC104_A/B<pin>, or through manipulation of the registers directly.

# Start tsctl server if it is not already running.
# This only needs to be done once
tsctl --server &

# Lookup the logical DIO mapping of the PC104 header pin A16
eval `tsctl 127.0.0.1 System MapLookup PC104_A16`
# If you run this outside of the eval it will return:
# PC104_A16=138

# Toggle the DIO high and low:
tsctl 127.0.0.1 DIO Set $PC104_A16 high
tsctl 127.0.0.1 DIO Set $PC104_A16 low

You can also drive these DIO to manually manipulate the PC104 address to make peripherals usable that require a higher range of address than provided by the default address space of the MUXBUS.

Pin Name Pin Name
A1 BUS_BHE# B1 Ground
A2 AD_07 B2 ISA_RESET
A3 AD_06 B3 5V
A4 AD_05 B4 AD_08
A5 AD_04 B5 CPU_3.3V
A6 AD_03 B6 USB_DN4+
A7 AD_02 B7 USB_DN4-
A8 AD_01 B8 PC104_11
A9 AD_D0 B9 VIN
A10 ISA_WAIT# B10 Ground
A11 PC104_10 B11 PC104_12
A12 PC104_09 B12 PC104_13
A13 PC104_08 B13 ISA_LOW#
A14 PC104_07 B14 ISA_IOR#
A15 PC104_06 B15 PC104_14
A16 PC104_05 B16 PC104_15
A17 PC104_04 B17 ISA_D09
A18 PC104_03 B18 ISA_D10
A19 PC104_02 B19 PC104_16
A20 PC104_01 B20 ISA_D12
A21 PC104_00 B21 ISA_IRQ7
A22 ADD_09 B22 ISA_IRQ6
A23 ADD_08 B23 ISA_IRQ5
A24 ADD_07 B24 Ground
A25 ADD_06 B25 ISA_D11
A26 ADD_05 B26 ISA_D13
A27 ADD_04 B27 ISA_D14
A28 ISA_03 B28 ISA_D15
A29 ADD_02 B29 5V
A30 ADD_01 B30 ISA 14.3 MHZ
A31 ADD_00 B31 Ground
A32 Ground B32 Ground
WARNING: Most of the pins on the PC104 bus are only 3.3V tolerant. Refer to the schematic for more details.