The FPGA includes 1 permanent clock, and 3 selectable clocks.
|mfp_51_pad (CN2_54)||12.5MHz||Always On|
|DIO 3 (CN1_87)||12.5MHz||Toggled in the #Syscon|
|DIO 34 (CN1_64)||25MHz||Toggled in the #Syscon|
|DIO 3 (CN1_87)||14.3MHz||Toggled in the #Syscon|
The last 3 clocks cannot all be enabled at the same time, but the CN2_54 clock is always enabled. If you require a different clock you can build a new bitstream excluding or adding clocks, or contact us for our engineering services.