TS-4700 PCB Changelog
From Technologic Systems Manuals
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| Revision
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Changes
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| A
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| B
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- FPGA 1.2V regulator (U7) changed from a NCP584 to a NCP585
- CPU Core regulator changed from a (U15) AOZ1022 to a (U19) SC183C
- Power sequencer circuit updated (added U15 and U16).
- Reset Latch (U4) uses a different signal for reset.
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| C
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- Change RAM (U17 & U18) from two x8 DDR2 to one x16 DDR3 to address EOL of original RAM.
- Add RAM termination circuit (U17)
- RAM regulator changed for 1.5V for DDR3 from FAN2022 (U6) to MVPG30 (U18)
- Adjust power sequence
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